1. Technical Field
The present invention relates to a nitride semiconductor device and a manufacturing method thereof.
2. Related Art
A conventional nitride semiconductor device, serving as a power device having a high OFF breakdown voltage, is known. This device includes a buffer layer that decreases distortion caused by differences in thermal expansion coefficients and lattice constants between the nitride semiconductor and a substrate, as shown in Patent Documents 1 to 5, for example. The buffer layer includes repeating composite layers that each include an AlN layer and a GaN layer.    Patent Document 1: Japanese Patent Application Publication No. 2007-88426    Patent Document 2: Japanese Patent Application Publication No. 2009-289956    Patent Document 3: Japanese Patent No. 4525894    Patent Document 4: Japanese Patent Application Publication No. 2010-239034    Patent Document 5: Japanese Translation of PCT International Patent Application No. 2007-518266
However, the lattice constant difference between the AlN layer and the GaN layer causes 2-dimensional electron gas carriers to occur in the buffer layer. Therefore, a lateral leak path is formed at the interface between the AlN layer and the GaN layer, thereby increasing the leak current. To solve this, there is a method of providing an AlGaN layer between the AlN layer and the GaN layer, as shown by Patent Document 3. However, even with this configuration, the lattice constant difference between the AlN layer and the GaN layer remains unchanged, and therefore the total amount of carriers generated in the overall buffer layer does not change. Accordingly, the leak current cannot be sufficiently restricted.
Another method is to add impurities to the GaN layer in the buffer layer to increase the resistance of the GaN layer and thereby decrease the effect of the leak current caused by the buffer layer, as shown by Patent Documents 4 and 5. Known impurities are carbon and transitional metals such as iron and nickel. However, when a high concentration of impurities is added to an epitaxial layer, cracks appear in the epitaxial layer and the dislocation density increases, thereby lowering the electron mobility. Furthermore, the addition of transitional metals causes phenomena that worsen the ON resistance, such as current collapse and current slump.